Sequential Circuits--Digital Logic | BPSC Tre 4.0 Computer Science MCQ

 Sequential Circuits_Digital Logic MCQ

1. A sequential circuit differs from a combinational circuit because it has:

A. Logic gates
B. Memory elements
C. Boolean expressions
D. Truth tables

Answer: B Combinational → Output depends only on present input. Sequential → Output depends on present input + past state (memory). Memory is implemented using flip-flops/latches.

2. The output of a sequential circuit depends on:

A. Present inputs only
B. Previous inputs only
C. Present inputs and previous states
D. Clock frequency only

Answer: C

3. Memory element used in sequential circuits is:

A. Decoder
B. Encoder
C. Flip-flop
D. Multiplexer

Answer: C

4. Sequential circuits are classified into:

A. Analog & Digital
B. Synchronous & Asynchronous
C. Linear & Nonlinear
D. Static & Dynamic

Answer: B Synchronous: controlled by clock. Asynchronous: no global clock.

5. SR latch is constructed using:

A. XOR gates
B. NAND/NOR gates
C. Multiplexers
D. Decoders

Answer: B

6. Invalid condition in SR latch occurs when:

A. S=0, R=0
B. S=1, R=0
C. S=0, R=1
D. S=1, R=1

Answer: D (Both outputs become same → violates complement rule.)

7. SR latch is also called:

A. Static memory
B. Bistable device
C. Monostable device
D. Oscillator

Answer: B (Bistable → two stable states (0 or 1))

8. Flip-flop is a:

A. Level-triggered device
B. Edge-triggered device
C. Linear device
D. Analog circuit

Answer: B (Flip-flops change state only at clock edge.)

9. Basic flip-flop derived from SR latch is:

A. JK flip-flop
B. T flip-flop
C. D flip-flop
D. All of these

Answer: D

10. Which flip-flop removes invalid state of SR FF?

A. T flip-flop
B. JK flip-flop
C. D flip-flop
D. RS latch

Answer: B (JK allows toggling when J=K=1.)

11. When J = K = 1, JK flip-flop:

A. Resets
B. Sets
C. Toggles
D. Holds

Answer: C

12. Characteristic equation of JK flip-flop is:

A. Q⁺ = D
B. Q⁺ = JQ' + K'Q
C. Q⁺ = T ⊕ Q
D. Q⁺ = Q

Answer: B

13. Race-around condition occurs in:

A. D FF
B. SR FF
C. JK FF
D. T FF

Answer: C (Occurs when clock pulse width > propagation delay.)

14. Race-around problem can be eliminated using:

A. Level triggering
B. Master-slave configuration
C. Increasing delay
D. Removing clock

Answer: B

15. D flip-flop is also called:

A. Delay flip-flop
B. Data flip-flop
C. Both A and B
D. Toggle FF

Answer: C

16. Characteristic equation of D FF is:

A. Q⁺ = D
B. Q⁺ = Q
C. Q⁺ = JQ
D. Q⁺ = TQ

Answer: A (Output follows input at clock edge.)

17. D flip-flop eliminates:

A. Toggle condition
B. Invalid state
C. Clock pulse
D. Memory

Answer: B

18. T flip-flop is obtained from JK FF when:

A. J=0, K=0
B. J=1, K=0
C. J=K=1 (tied together)
D. J=0, K=1

Answer: C

19. Characteristic equation of T FF:

A. Q⁺ = TQ
B. Q⁺ = T ⊕ Q
C. Q⁺ = D
D. Q⁺ = Q'

Answer: B

20. T flip-flop is mainly used in:

A. Adders
B. Counters
C. Decoders
D. Encoders

Answer: B

21. Setup time is:

A. Time after clock edge
B. Minimum time input must remain before clock edge
C. Clock delay
D. Propagation delay

Answer: B

22. Hold time is:

A. Time input remains stable after clock edge
B. Clock duration
C. Memory delay
D. Output delay

Answer: A

23. Propagation delay is:

A. Clock period
B. Input-output delay
C. Setup time
D. Hold time

Answer: B

24. Register is a group of:

A. Gates
B. Flip-flops
C. Counters
D. Encoders

Answer: B

25. Shift register performs:

A. Arithmetic operation
B. Data shifting
C. Encoding
D. Decoding

Answer: B

26. SISO stands for:

A. Single Input Single Output
B. Serial In Serial Out
C. Serial In System Out
D. Shift Input Shift Output

Answer: B

27. PIPO register means:

A. Parallel In Parallel Out
B. Pulse In Pulse Out
C. Parallel Internal Parallel Output
D. None

Answer: A

28. Counter is a:

A. Sequential circuit
B. Combinational circuit
C. Analog circuit
D. Linear circuit

Answer: A

29. MOD number of counter means:

A. Number of flip-flops
B. Maximum count states
C. Clock frequency
D. Delay

Answer: B

30. Minimum flip-flops required for MOD-16 counter:

A. 2
B. 3
C. 4
D. 5

Answer: C (2n≥16⇒n=4)

31. Ripple counter is also called:

A. Synchronous counter
B. Asynchronous counter
C. Parallel counter
D. Johnson counter

Answer: B

32. Main disadvantage of ripple counter:

A. High cost
B. Propagation delay accumulation
C. Large size
D. Power loss

Answer: B

33. In synchronous counter:

A. Each FF has separate clock
B. All FF share same clock
C. No clock used
D. Random clock

Answer: B

34. Sequential circuit without clock is:

A. Synchronous
B. Asynchronous
C. Static
D. Edge-triggered

Answer: B

35. State diagram represents:

A. Logic gate arrangement
B. State transitions
C. Boolean equation
D. Timing delay

Answer: B

36. Moore machine output depends on:

A. Input only
B. State only
C. Input + State
D. Clock only

Answer: B

37. Mealy machine output depends on:

A. State only
B. Input only
C. Input and State
D. Clock only

Answer: C

38. Moore machine compared to Mealy machine has:

A. Faster output
B. Less states
C. More stable output
D. No memory

Answer: C

39. Number of states in n flip-flops system:

A. n
B. 2n
C. 2ⁿ
D. n²

Answer: C

40. Edge triggering improves:

A. Power consumption
B. Timing reliability
C. Size
D. Voltage level

Answer: B

41. Which of the following devices serve as a memory for the sequential circuits?

A. A multiplexer
B. A logic gate
C. A flip-flop
D. A decoder

Answer: C

42. Which of the following is not used to build the combinational logic in any sequential circuit?

A. Read Only Memory
B. Programmable Logic Array
C. Logic gates
D. Flip-flop

Answer: D

43. For which purpose a clock circuit is used with a sequential circuit?

A. To activate the circuitry
B. To synchronize the operations of all flip-flops
C. To overcome a definite propagation delay
D. To shift data through used shift registers

Answer: B

44. Which one of the following is used as a memory of a sequential circuit?

A. D flip-flop
B. JK flip-flop
C. T flip-flop
D. Master Slave flip-flop

Answer: A

Last Min Notes :- 

1. Sequential Circuit

A sequential circuit is a digital logic circuit whose output depends not only on present inputs but also on the previous state of the system.
Output=f(Present Input, Previous State)
Sequential circuits contain memory elements such as flip-flops to store past information.

Characteristics

• Has memory
• Feedback paths present
• Time dependent
• Usually clock controlled

Types

1. Synchronous Sequential Circuit – controlled by clock signal.

2. Asynchronous Sequential Circuit – operates without clock.

2. Latch

A latch is a level-triggered memory device used to store one bit of data.

SR Latch

Constructed using NAND or NOR gates.

4. Flip-Flop

A flip-flop is an edge-triggered bistable multivibrator used as a basic storage element in sequential circuits.It changes state only at clock transitions.

Applications

• Registers
• Counters
• Memory units
• Control circuits

5. Types of Flip-Flops

(a) SR Flip-Flop

Stores binary information using Set and Reset inputs.

Disadvantage: Invalid condition exists.

(b) JK Flip-Flop

Improved version of SR flip-flop that removes invalid state.

(c) D Flip-Flop

Has only one input (D).

(d) T Flip-Flop

Derived from JK flip-flop by connecting J and K together.

7. Registers

A register is a group of flip-flops used to store binary data.

Types of Registers

• Serial In Serial Out (SISO)
• Serial In Parallel Out (SIPO)
• Parallel In Serial Out (PISO)
• Parallel In Parallel Out (PIPO)

A register that shifts data left or right with each clock pulse.

Applications:

• Data transfer
• Data storage
• Serial communication

8. Counters

A counter is a sequential circuit that counts clock pulses.

Types

Asynchronous (Ripple) Counter

• Flip-flops triggered sequentially.

• Propagation delay accumulates.

Synchronous Counter

• All flip-flops share same clock.

• Faster and reliable.

MOD of Counter

• MOD number represents total count states.

• $$Number\ of\ Flip\text{-}Flops = \log_2(MOD)$$

• MOD-8 → 3 flip-flops

• MOD-16 → 4 flip-flops

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